1. Field of the invention
The present invention relates to a video camera apparatus which employs a solid-state image sensor, such as a CCD (charge coupled device) and, more particularly to a high shutter speed video camera which can clearly pick up the image of the object even when the object is moving at a high speed.
2. Description of the Prior Art
Recently, most of the video tape recorders have special replays, such as a still picture replay, a slow motion replay and a frame advance replay. To provide a high quality pictures even for such special replays, the image in each field should be clear, particularly when taking a video of an object which is moving at a high speed. To this end, a video camera which can take the picture of each field with a fast shutter speed should be used.
An example of prior art high shutter speed video camera is explained with reference to FIGS. 1-3. FIG. 1 diagrammatically shows a high shutter speed video camera which employs an interline charge coupled type solid-state image sensor (IL-CCD) 4 so positioned as to receive an image formed by an optical lens 3. A mechanical shutter 1, defined by a disc having slits 1a, is located in the optical path B between lens 3 and IL-CCD 4. The disc is rotated in the direction A by a motor 1b and its speed is controlled by a shutter controller 2, thus controlling the shutter speed. A driver 5 drives IL-CCD 4 and the image signal C produced from IL-CCD 4 is applied to a signal processor 6 which changes the image signal C to television signal D.
The prior art high shutter speed video camera operates as follows. First, the shutter speed is selected by shutter controller 2. Then, mechanical shutter 1 alternately opens and closes the optical path B at the selected shutter speed. When the mechanical shutter 1 is opened, the image which has passed through optical lens 3 is transmitted to IL-CCD 4, which then accumulates electric charges correspondingly to the brightness of the image, thereby producing the image signal C, which is converted to television signal D in the signal processor 6.
Next, the structure and the operation of IL-CCD 4 will be described in connection with FIGS. 2 and 3. A plurality of photodiodes 7 are aligned vertically and horizontally. Data transfer registers 8 are provided correspondingly to the columns of the photodiode arrays so as to vertically shift the data of accumulated charge in the photodiodes to a shift register 15, which is provided for scanning the data line by line. Each shift register 8 is defined by the repetition of cells 9, 10, 11 and 12 in which cells 9 and 11 are connected to photodiodes 7 through switching transistors 13. The gate structure of cells 9 and 11 are identical to each other, and the gate structure of cells 10 and 12 are identical to each other. The CCD is driven by signals E1, E2, E3 and E4 inputted to terminals 14a, 14b, 14c and 14d. A line for transmitting signal E4 is connected to transistor 13a and cell 9; a line for transmitting signal E3 is connected to cell 10; a line for transmitting signal E2 is connected to transistor 13b and cell 11; and a line for transmitting signal E1 is connected to cell 12.
Shift register 15 is defined by cells 16 and 17 aligned alternately and is driven by horizontal drive pulses H1 and H2 connected to cells 16 and 17, respectively. The output of shift register 15 is connected to a charge detector 19, which changes the charge signal to voltage signal. Usually, the charge detector is defined by a floating diffusion amplifier. The charge detector produces the image signal C which is outputted from terminal 20.
As shown in FIG. 3, signal E4 takes three different levels, the zero or reference level, the high level as in vertical drive pulses 40d, and the extra-high level as in read pulses 37' and 38'. By the extra-high level read pulse 37' or 38', transistor 13a turns on to move the charge accumulated in photodiode 7a to cell 9, thereby reading the image data in photodiodes 7 to registers 8. Then, by the high level V-drive pulse 40d, the data stored in cell 10 is shifted in the vertical direction to cell 9.
Signal E1 takes two levels, the reference level and the low level as in negative going V-drive pulses 40a, which effects the transfer of data to cell 12 from the cell behind it, i.e., cell 9.
Signal E2 takes three levels, the reference level, the high level and the low level. By the high level read pulse 37 or 38, transistor 13b turns on to move the charge accumulated in photodiode 7b to cell 11, and by the negative going V-drive pulses 40b, the data stored in cell 12 is shifted to cell 11.
Signal E3 takes two level, the reference level and the high level as in V-drive pulses 40c. By the V-drive pulses 40c, the data stored in cell 11 is shifted to cell 10.
From the practical viewpoint, the reference levels of signals E1 and E2 and the high levels of signals E3 and E4 are set at the same level.
It is to be noted that the pulses are produced for example, in the order of 40c, 40a, 40d and 40b so as to shift the data smoothly.
In operation, photodiodes 7 in the CCD receive an image, which is formed by lens 3 and has been passed through slit 1a. Since slit 1a moves across the CCD very fast, the CCD surface is exposed at a high shutter speed determined by the speed of rotation of the disc. Thus, even when the object is moving fast, the image can be captured at the very short time. Thus, there will be no, or very small, movement of the object effected during the image being impinged on the CCD, thereby resulting in a clear and sharp image formed on the CCD. Then, in response to pulses 37 and 37' (FIG. 3), switching transistors 13 conduct to transfer the charges accumulated in photodiodes 7 to the corresponding cells 9 and 11. Then, by the first four pulses 40a, 40b, 40c and 40d, applied at terminals 14a, 14b, 14c and 14d, respectively, the image stored in the shift registers 8 is shifted towards shift register 15 by one line, and at the same time, the image data stored in the first line cells 9 are shifted to shift register 15. Then, before the second four pulses 40a, 40b, 40c and 40d are applied, H-drive pulses H1 and H2 of high frequency are applied to terminals 18a and 18b to scan the line data completely through charge detector 19, thereby making register 15 empty. Then, when the second four pulses 40a, 40b, 40c and 40d are applied, the image stored in the shift register 8 is shifted towards shift register 15 by one line, and the image data stored in the first line cells 9 are shift to shift register 15. This operation is repeated by the number of rows (for example 525 rows) of photodiodes aligned in the CCD, i.e., until all the image data stored in the shift register 8 has been moved to and scanned out from shift register 15. In this manner, image signal C for one field is produced serially from terminal 20.
Therefore, in the prior art high shutter speed video camera described above, the charges accumulated in photodiodes 7 in the vertical scan period (V-scan period) in one odd field are shifted to shift registers 8 and are serially produced from terminal 20 in the V-scan period of the following even field. Also, because the shutter mechanism is provided, the image of the object is formed on photodiodes 7 only a very short time within V-scan period, resulting in a sharp and clear image, even when the object is moving fast.
According to the prior art high shutter speed video camera described above, since mechanical shutter 1 is provided, the camera body is bulky and heavy. Also, since motor 1b must be precisely adjusted, the camera requires a high manufacturing cost.